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7 November, 2023
Santa Clara, CA, USA
The RISC-V Summit brings together the global RISC-V community, including technical, industrial, domain, ecosystem, and special interest organisations who define the architecture’s specifications. The community exists to share technological advancements, industry milestones, and case studies in order to network and establish relationships.
RISC-V Summit 2023 features two days of fascinating technical and industry keynotes and conference sessions, as well as an exhibition full of community members displaying the newest community advancements and products.
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We will be at booth G6 during this event, so please book a meeting with us and chat with our experts about all things CPU and learn why Imagination is the GPU of choice for RISC-V.
Adoption of RISC-V for ISO 26262
Speakers: Ravindranath Munnan, Imagination Technologies
When & where: November 8th 1:55pm – 2:15pm in the Theater
The RISC-V ISA is evolving to create an infrastructure which is modular and supports custom instructions. This unique feature of RISC-V is enabling a wide range of specialized processors and accelerators to be developed. Furthermore, RISC-V microprocessors are of vested interest in safety applications for the same reasons, owing to its open ISA model and inherent flexibility. Nonetheless, automotive grade RISC-V Hardware and Software must adhere to the guidelines of ISO26262 where safety functionality is concerned. For what is historically an open and flexible, agile, ISA, this poses a potential challenge when adopting and adhering to the expectations outlined in ISO26262 throughout the entire lifecycle.
The aim of this paper therefore is to consider the Features, Strengths, and Limitations of RISC- V ISA and Functional Safety / ISO26262 standards, the challenges and threats posed by ISO26262 guidelines in the domain of Open-standard ISA, the challenges in adoption of ISO26262 for RISC-V, Key considerations for using RISC-V based Hardware in safety-critical applications complying to ISO26262; Open-source ISA Evolution and maintaining ISO26262 compliance.
The Application of RISC-V Extensions to Automotive Zonal Controllers
Speaker: Marc Canal, Imagination Technologies
When & where: November 8th 2:55pm – 3:15pm in the Theater
As the complexity of electronics in vehicles increases, there has been a move to combine the workloads of several ECUs into one, more powerful ‘Domain controller’. One undesired effect of this design is that the amount and complexity of wiring increases, adding cost and weight, and introducing potential reliability issues. This can be addressed by combining functionality based on location rather than type in a Zonal system architecture. This architecture is based on Zonal Control Units (ZCUs) which drives the development of multi-core embedded and mixed criticality systems. However, it poses challenges including integration at both the Hardware and Software level of functionality from multiple different control units.
This paper will look at the how the RISC-V ISA, including the Hypervisor, PMP and SPMP extensions help to address these issues, and facilitate RISC-V adoption in driving tomorrow’s mobility. We will compare with other approaches to achieve the required isolation, providing guidance for system designers.